caa a22 4500 465742424 CHVBK 20180323111811.0 cr unu---uuuuu 170327e19901001xx s 000 0 eng 10.1007/BF00935000 doi (NATIONALLICENCE)springer-10.1007/BF00935000 The Navy's new standard digital signal processor, the AN/UYS-2 [Elektronische Daten] [G. Melcher, G. Thomas, D. Kaplan] Current Navy signal processing requirements range from tens of millions to hundreds of millions of multiply-add operations per second. It is expected that these requirements will increase tenfold within the next ten years. To accommodate these expanding requirements, the Navy is building the Signal Processor (AN/UYS-2). The AN/UYS-2 design is driven by the fact that it is the Navy standard signal processor. Being a stantard, it must satisfy more requirements than just high throughput. It must be programmable, modular, expandable, flexible supportable, reliable and provide this capability for the next 20 years to support existing and future users. In order to make it programmable (and therefore reduce the total life cycle ownership cost), the AN/UYS-2 utilizes a Navy developed signal processing graph language methodology called PGM. The implementation of PGM on AN/UYS-2, provides the AN/UYS-2 user with a convenient and cost effective way of specifying the signal proccessing algorithms to be executed for a given application. The AN/UYS-2 desgin approach is to implement PGM and to develop a modular, multiprocessor that could meet a wide range of air, sea, and shore signal processing applications. In order to meet this requirement, a hybrid control-flow/data-flow architecture was chosen to enable evolutionary technology infusion. VLSI component technology is required to implement the primary processing engine in the architecture. The AN/UYS-2 architecture consists of a variable combination of multiple types of Functional Elements (FEs), a data transfer network, a control bus, and a built-in-test (BIT) control bus. This paper provides a review of AN/UYS-2 basic design and growth potential. Kluwer Academic Publishers, 1990 Melcher G. Space and Naval Warfare Systems Command, U.S. Navy, Washington, DC aut Thomas G. Naval Sea Systems Command, U.S. Navy, Washington, DC aut Kaplan D. Naval Sea Systems Command, U.S. Navy, Washington, DC aut Journal of VLSI Signal Processing Springer Netherlands 2/2(1990-10-01), 103-109 0922-5773 2:2<103 1990 2 11265 https://doi.org/10.1007/BF00935000 text/html Onlinezugriff via DOI 1 research-article jats NATIONALLICENCE 856 40 https://doi.org/10.1007/BF00935000 text/html Onlinezugriff via DOI NATIONALLICENCE 700 1- Melcher G. Space and Naval Warfare Systems Command, U.S. Navy, Washington, DC aut NATIONALLICENCE 700 1- Thomas G. Naval Sea Systems Command, U.S. Navy, Washington, DC aut NATIONALLICENCE 700 1- Kaplan D. Naval Sea Systems Command, U.S. Navy, Washington, DC aut NATIONALLICENCE 773 0- Journal of VLSI Signal Processing Springer Netherlands 2/2(1990-10-01), 103-109 0922-5773 2:2<103 1990 2 11265 Metadata rights reserved Springer special CC-BY-NC licence nationallicence BK010053 XK010053 XK010000 NATIONALLICENCE NATIONALLICENCE NL-springer