caa a22 4500 46574253X CHVBK 20180323111811.0 cr unu---uuuuu 170327e19900401xx s 000 0 eng 10.1007/BF00929920 doi (NATIONALLICENCE)springer-10.1007/BF00929920 A VLSI structure for X (mod m ) operation [Elektronische Daten] [Giuseppe Alia, Enrico Martinelli] High-computing speed and modularity have made RNS-based arithmetic processors attractive for a long time, especially in signal processing, where additions and multiplications are very frequent. The VLSI technology renewed this interest because RNS-based circuits are becoming more feasible; however, intermodular operations degradate their performance and a great effort results on this topic. In this paper, we deal with the problem of performing the basic operationX(modm), that is the remainder of the integer divisionX/m, for large values of the integerX, following an approximating and correcting approach, which guarantees the correctness of the result. We also define a structure to computeX(modm) by means of few fast VLSI binary multipliers, which is exemplified for 32-bit long numbers, obtaining a total response time lower than 200 nsec. Furthermore, such a structure is evaluated in terms of VLSI complexity and area and time figuresA=ϑ(n 2 T m 2 ) andT=ϑ(T M ) for the parameterT M in $$[\log n,\sqrt n ]$$ are derived. A simple positional-to-residue converter is finally presented, based on this structure; it improves some complexity results previously obtained by authors. Kluwer Academic Publishers, 1990 Alia Giuseppe Instituto di Elettronic e Telecomunicazioni, Facoltá di Ingegneria, Universitá di Pisa, Via Diotisalvi, 2, 56100, Pisa, Italy aut Martinelli Enrico Istituto di Elaborazione dell'Informazione del Consiglio Nazionale delle Ricerche, Via S. Maria, 46, 56100, Pisa, Italy aut Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands 1/4(1990-04-01), 257-264 0922-5773 1:4<257 1990 1 11265 https://doi.org/10.1007/BF00929920 text/html Onlinezugriff via DOI 1 research-article jats NATIONALLICENCE 856 40 https://doi.org/10.1007/BF00929920 text/html Onlinezugriff via DOI NATIONALLICENCE 700 1- Alia Giuseppe Instituto di Elettronic e Telecomunicazioni, Facoltá di Ingegneria, Universitá di Pisa, Via Diotisalvi, 2, 56100, Pisa, Italy aut NATIONALLICENCE 700 1- Martinelli Enrico Istituto di Elaborazione dell'Informazione del Consiglio Nazionale delle Ricerche, Via S. Maria, 46, 56100, Pisa, Italy aut NATIONALLICENCE 773 0- Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands 1/4(1990-04-01), 257-264 0922-5773 1:4<257 1990 1 11265 Metadata rights reserved Springer special CC-BY-NC licence nationallicence BK010053 XK010053 XK010000 NATIONALLICENCE NATIONALLICENCE NL-springer