caa a22 4500 469039736 CHVBK 20180323132807.0 cr unu---uuuuu 170328e19920201xx s 000 0 eng 10.1007/BF00159834 doi (NATIONALLICENCE)springer-10.1007/BF00159834 Test quality of hierarchical defect-tolerant integrated circuits [Elektronische Daten] [Claude Thibeault, Yvon Savaria, Jean Houle] This paper presents a theoretical expression to evaluate the test quality of hierarchical defect-tolerant integrated circuits. This expression, which is developed for circuits with two levels of hierarchy, is based on a defect model with which one can take into account the relative importance (probability of occurrence) of each defect and consequently of each fault. Results obtained from this expression show that, for a given test coverage, the addition of defect-tolerance mechanisms decreases the test quality of integrated circuits. These results are important because they indicate that fault coverage can be a misleading measure of the test quality of defect-tolerant integrated circuits. Kluwer Academic Publishers, 1992 Combinatorial analysis nationallicence defect level nationallicence defect modeling nationallicence defect tolerance nationallicence fault coverage nationallicence Thibeault Claude Computer Science Department, U.Q.A.M., C.P. 8888, Station A, H3C 3P8, Montreal, QC, Canada aut Savaria Yvon Electrical Engineering Department, Ecole Polytechnique de Montréal, C.P. 6079, Station A, H3C 3A7, Montreal, QC, Canada aut Houle Jean Electrical Engineering Department, Ecole Polytechnique de Montréal, C.P. 6079, Station A, H3C 3A7, Montreal, QC, Canada aut Journal of Electronic Testing Kluwer Academic Publishers 3/1(1992-02-01), 93-102 0923-8174 3:1<93 1992 3 10836 https://doi.org/10.1007/BF00159834 text/html Onlinezugriff via DOI 1 research-article jats NATIONALLICENCE 856 40 https://doi.org/10.1007/BF00159834 text/html Onlinezugriff via DOI NATIONALLICENCE 700 1- Thibeault Claude Computer Science Department, U.Q.A.M., C.P. 8888, Station A, H3C 3P8, Montreal, QC, Canada aut NATIONALLICENCE 700 1- Savaria Yvon Electrical Engineering Department, Ecole Polytechnique de Montréal, C.P. 6079, Station A, H3C 3A7, Montreal, QC, Canada aut NATIONALLICENCE 700 1- Houle Jean Electrical Engineering Department, Ecole Polytechnique de Montréal, C.P. 6079, Station A, H3C 3A7, Montreal, QC, Canada aut NATIONALLICENCE 773 0- Journal of Electronic Testing Kluwer Academic Publishers 3/1(1992-02-01), 93-102 0923-8174 3:1<93 1992 3 10836 Metadata rights reserved Springer special CC-BY-NC licence nationallicence BK010053 XK010053 XK010000 NATIONALLICENCE NATIONALLICENCE NL-springer