caa a22 4500 469039809 CHVBK 20180323132808.0 cr unu---uuuuu 170328e19920801xx s 000 0 eng 10.1007/BF00134733 doi (NATIONALLICENCE)springer-10.1007/BF00134733 An efficient design of embedded memories and their testability analysis using Markov chains [Elektronische Daten] [P. Mazumder, J. Patel] This article presents a design strategy for efficient and comprehensive random testing of embedded random-access memory (RAM) where neither are the address, read/write and data input lines directly controllable nor are the data output lines externally observable. Unlike the conventional approaches, which frequently employ on-chip circuits such as linear feedback shift register (LFSR), data registers and multibit comparator for verifying the response of the memory-under-test (MUT) with the reference signature of a fault-free gold unit, the proposed technique uses an efficient testable design, which helps accelerate test algorithms by a factor of 0.5√n, if the RAM is organized into an n×1 array and improve the test reliability by eliminating the LFSR that is known to have aliasing problems. Another serious problem in embedded memory testing by random test patterns is the problem of memory initialization, which has been tackled here by adding word-line flag registers. The paper has made indepth empirical studies of the functional faults such as stuck-at, coupling, and pattern-sensitive by suitably representing these faults by Markov chains and by simulating these chains to derive various test lengths required for detecting these faults. The simulation results conclusively show that, in order to test a IM-bit RAM for detecting the common functional faults, the proposed technique needs only one second as opposed to about an hour needed by the conventional random testing where memory cells are tested sequentially. Kluwer Academic Publishers, 1992 Embedded random-access memories nationallicence random testing and testable design nationallicence Mazumder P. Department of Electrical Engineering and Computer Science, University of Michigan, 48109, Ann Arbor, MI, USA aut Patel J. Coordinated Science Laboratory, Unverisity of Illinois, 61801, Urbana, IL, USA aut Journal of Electronic Testing Kluwer Academic Publishers 3/3(1992-08-01), 235-250 0923-8174 3:3<235 1992 3 10836 https://doi.org/10.1007/BF00134733 text/html Onlinezugriff via DOI 1 research-article jats NATIONALLICENCE 856 40 https://doi.org/10.1007/BF00134733 text/html Onlinezugriff via DOI NATIONALLICENCE 700 1- Mazumder P. Department of Electrical Engineering and Computer Science, University of Michigan, 48109, Ann Arbor, MI, USA aut NATIONALLICENCE 700 1- Patel J. Coordinated Science Laboratory, Unverisity of Illinois, 61801, Urbana, IL, USA aut NATIONALLICENCE 773 0- Journal of Electronic Testing Kluwer Academic Publishers 3/3(1992-08-01), 235-250 0923-8174 3:3<235 1992 3 10836 Metadata rights reserved Springer special CC-BY-NC licence nationallicence BK010053 XK010053 XK010000 NATIONALLICENCE NATIONALLICENCE NL-springer