caa a22 4500 469125586 CHVBK 20180323133149.0 cr unu---uuuuu 170328e19920501xx s 000 0 eng 10.1007/BF00925123 doi (NATIONALLICENCE)springer-10.1007/BF00925123 DDFSGEN [Elektronische Daten] A silicon compiler for direct digital frequency synthesizers [Linda Lau, Rajeev Jain, Henry Samueli, Henry Nicholas III, Etan Cohen] This paper presents a functional compiler for the automatic design of Direct Digital Frequency Synthesizer (DDFS) integrated circuits (ICs) using a ROM based table look-up architecture. The compiler allows the user to specify high-level specifications such as the acceptable spurious response and it generates the IC architecture, floorplan, and layout. To construct the layout for different specifications, a library of parameterized macrocells has been developed in 1.2 μm CMOS technology. A test chip with a quadrature DDFS module has been generated, using the compiler, and fabricated. The chip has two input signals: one is for frequency control while the other is for phase initialization. Input and output word lengths are 16 bits and 6 bits respectively. The chip complexity is approximately 12,000 transistors (DDFS core) and the die size is 4.8×2.9mm 2. A maximum sample rate of 80 MHz has been attained implying a maximum sine (cosine) output frequency of 40 MHz and a frequency resolution of 1.22 kHz. The maximum spurious level measured is −46 dB. Kluwer Academic Publishers, 1992 Lau Linda Electrical Engineering Department, UCLA, 90024, Los Angeles, CA aut Jain Rajeev Electrical Engineering Department, UCLA, 90024, Los Angeles, CA aut Samueli Henry Electrical Engineering Department, UCLA, 90024, Los Angeles, CA aut Nicholas III Henry Electrical Engineering Department, UCLA, 90024, Los Angeles, CA aut Cohen Etan Electrical Engineering Department, UCLA, 90024, Los Angeles, CA aut Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands 4/2-3(1992-05-01), 213-226 0922-5773 4:2-3<213 1992 4 11265 https://doi.org/10.1007/BF00925123 text/html Onlinezugriff via DOI 1 research-article jats NATIONALLICENCE 856 40 https://doi.org/10.1007/BF00925123 text/html Onlinezugriff via DOI NATIONALLICENCE 700 1- Lau Linda Electrical Engineering Department, UCLA, 90024, Los Angeles, CA aut NATIONALLICENCE 700 1- Jain Rajeev Electrical Engineering Department, UCLA, 90024, Los Angeles, CA aut NATIONALLICENCE 700 1- Samueli Henry Electrical Engineering Department, UCLA, 90024, Los Angeles, CA aut NATIONALLICENCE 700 1- Nicholas III Henry Electrical Engineering Department, UCLA, 90024, Los Angeles, CA aut NATIONALLICENCE 700 1- Cohen Etan Electrical Engineering Department, UCLA, 90024, Los Angeles, CA aut NATIONALLICENCE 773 0- Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands 4/2-3(1992-05-01), 213-226 0922-5773 4:2-3<213 1992 4 11265 Metadata rights reserved Springer special CC-BY-NC licence nationallicence BK010053 XK010053 XK010000 NATIONALLICENCE NATIONALLICENCE NL-springer