<?xml version="1.0" encoding="UTF-8"?>
<collection xmlns="http://www.loc.gov/MARC21/slim">
 <record>
  <leader>     caa a22        4500</leader>
  <controlfield tag="001">469125640</controlfield>
  <controlfield tag="003">CHVBK</controlfield>
  <controlfield tag="005">20180323133150.0</controlfield>
  <controlfield tag="007">cr unu---uuuuu</controlfield>
  <controlfield tag="008">170328e19920501xx      s     000 0 eng  </controlfield>
  <datafield tag="024" ind1="7" ind2="0">
   <subfield code="a">10.1007/BF00925117</subfield>
   <subfield code="2">doi</subfield>
  </datafield>
  <datafield tag="035" ind1=" " ind2=" ">
   <subfield code="a">(NATIONALLICENCE)springer-10.1007/BF00925117</subfield>
  </datafield>
  <datafield tag="245" ind1="0" ind2="0">
   <subfield code="a">Parallel implementation of neural networks</subfield>
   <subfield code="h">[Elektronische Daten]</subfield>
   <subfield code="c">[K. Wojtek Przytula, Viktor Prasanna, Wei-Ming Lin]</subfield>
  </datafield>
  <datafield tag="520" ind1="3" ind2=" ">
   <subfield code="a">This paper presents systematic methods, based on graph theoretic approach, for mapping of neural networks onto mesh connected SIMD arrays. The methods are applicable to a large class of multilayer network models, which can be represented in terms of sparse matrix vector operations. The class of computers, that the mappings are suitable for, encompasses most of the experimental and commercial mesh-connected SIMD arrays of processors. There are three methods described in the paper, one for the case of a processor array, which is larger or equal to the network size and two for the partitioned case, i.e. array smaller than the input data size. The methods are illustrated on an example of a multilayer perceptron with back-propagation learning, which consists ofn nuerons ande synaptic connections. For the first method, the processor array is assumed to be of sizeN×N, whereN 2 ≥n+e, and the required local memory of processors is limited to only a few registers. The implementation of a single iteration of a recall phase according to the method requires 24(N-1) shifts. For this method we have developed a software tool, which generates a sequence of pseudo instructions, such as elemental data shift and arithmetic operations, that implement a given neural network on a given size processor array. For the two partitioned methods, the processor array is of sizeP×P, whereP 2≤n+e, and the local memory in the processors is of sizeO(K). The faster of the two methods requiresO(N 3/P 3 K) time for an iteration of the recall or learning phase.</subfield>
  </datafield>
  <datafield tag="540" ind1=" " ind2=" ">
   <subfield code="a">Kluwer Academic Publishers, 1992</subfield>
  </datafield>
  <datafield tag="700" ind1="1" ind2=" ">
   <subfield code="a">Wojtek Przytula</subfield>
   <subfield code="D">K.</subfield>
   <subfield code="u">Hughes Research Labs, 3011 Malibu Canyon Road, 90265, Malibu, CA</subfield>
   <subfield code="4">aut</subfield>
  </datafield>
  <datafield tag="700" ind1="1" ind2=" ">
   <subfield code="a">Prasanna</subfield>
   <subfield code="D">Viktor</subfield>
   <subfield code="u">Department of EE-Systems, EEB-244, University of Southern California, 90089-2662, Los Angeles, CA</subfield>
   <subfield code="4">aut</subfield>
  </datafield>
  <datafield tag="700" ind1="1" ind2=" ">
   <subfield code="a">Lin</subfield>
   <subfield code="D">Wei-Ming</subfield>
   <subfield code="u">Department of Electrical and Computer Engineering, Mississippi State University, 39762, Mississippi State, MS</subfield>
   <subfield code="4">aut</subfield>
  </datafield>
  <datafield tag="773" ind1="0" ind2=" ">
   <subfield code="t">Journal of VLSI signal processing systems for signal, image and video technology</subfield>
   <subfield code="d">Springer Netherlands</subfield>
   <subfield code="g">4/2-3(1992-05-01), 111-123</subfield>
   <subfield code="x">0922-5773</subfield>
   <subfield code="q">4:2-3&lt;111</subfield>
   <subfield code="1">1992</subfield>
   <subfield code="2">4</subfield>
   <subfield code="o">11265</subfield>
  </datafield>
  <datafield tag="856" ind1="4" ind2="0">
   <subfield code="u">https://doi.org/10.1007/BF00925117</subfield>
   <subfield code="q">text/html</subfield>
   <subfield code="z">Onlinezugriff via DOI</subfield>
  </datafield>
  <datafield tag="908" ind1=" " ind2=" ">
   <subfield code="D">1</subfield>
   <subfield code="a">research-article</subfield>
   <subfield code="2">jats</subfield>
  </datafield>
  <datafield tag="950" ind1=" " ind2=" ">
   <subfield code="B">NATIONALLICENCE</subfield>
   <subfield code="P">856</subfield>
   <subfield code="E">40</subfield>
   <subfield code="u">https://doi.org/10.1007/BF00925117</subfield>
   <subfield code="q">text/html</subfield>
   <subfield code="z">Onlinezugriff via DOI</subfield>
  </datafield>
  <datafield tag="950" ind1=" " ind2=" ">
   <subfield code="B">NATIONALLICENCE</subfield>
   <subfield code="P">700</subfield>
   <subfield code="E">1-</subfield>
   <subfield code="a">Wojtek Przytula</subfield>
   <subfield code="D">K.</subfield>
   <subfield code="u">Hughes Research Labs, 3011 Malibu Canyon Road, 90265, Malibu, CA</subfield>
   <subfield code="4">aut</subfield>
  </datafield>
  <datafield tag="950" ind1=" " ind2=" ">
   <subfield code="B">NATIONALLICENCE</subfield>
   <subfield code="P">700</subfield>
   <subfield code="E">1-</subfield>
   <subfield code="a">Prasanna</subfield>
   <subfield code="D">Viktor</subfield>
   <subfield code="u">Department of EE-Systems, EEB-244, University of Southern California, 90089-2662, Los Angeles, CA</subfield>
   <subfield code="4">aut</subfield>
  </datafield>
  <datafield tag="950" ind1=" " ind2=" ">
   <subfield code="B">NATIONALLICENCE</subfield>
   <subfield code="P">700</subfield>
   <subfield code="E">1-</subfield>
   <subfield code="a">Lin</subfield>
   <subfield code="D">Wei-Ming</subfield>
   <subfield code="u">Department of Electrical and Computer Engineering, Mississippi State University, 39762, Mississippi State, MS</subfield>
   <subfield code="4">aut</subfield>
  </datafield>
  <datafield tag="950" ind1=" " ind2=" ">
   <subfield code="B">NATIONALLICENCE</subfield>
   <subfield code="P">773</subfield>
   <subfield code="E">0-</subfield>
   <subfield code="t">Journal of VLSI signal processing systems for signal, image and video technology</subfield>
   <subfield code="d">Springer Netherlands</subfield>
   <subfield code="g">4/2-3(1992-05-01), 111-123</subfield>
   <subfield code="x">0922-5773</subfield>
   <subfield code="q">4:2-3&lt;111</subfield>
   <subfield code="1">1992</subfield>
   <subfield code="2">4</subfield>
   <subfield code="o">11265</subfield>
  </datafield>
  <datafield tag="900" ind1=" " ind2="7">
   <subfield code="a">Metadata rights reserved</subfield>
   <subfield code="b">Springer special CC-BY-NC licence</subfield>
   <subfield code="2">nationallicence</subfield>
  </datafield>
  <datafield tag="898" ind1=" " ind2=" ">
   <subfield code="a">BK010053</subfield>
   <subfield code="b">XK010053</subfield>
   <subfield code="c">XK010000</subfield>
  </datafield>
  <datafield tag="949" ind1=" " ind2=" ">
   <subfield code="B">NATIONALLICENCE</subfield>
   <subfield code="F">NATIONALLICENCE</subfield>
   <subfield code="b">NL-springer</subfield>
  </datafield>
 </record>
</collection>
